Study of IEEE 1149.4 mixed-signal test bus and its application

Pao Yue-kong Library Electronic Theses Database

Study of IEEE 1149.4 mixed-signal test bus and its application

 

Author: Lam, Chi-kin
Title: Study of IEEE 1149.4 mixed-signal test bus and its application
Degree: M.Sc.
Year: 2001
Subject: Hong Kong Polytechnic University -- Dissertations
Mixed signal circuits -- Testing
Department: Multi-disciplinary Studies
Dept. of Electronic Engineering
Pages: viii, 81 leaves : ill. ; 30 cm
Language: English
InnoPac Record: http://library.polyu.edu.hk/record=b1625993
URI: http://theses.lib.polyu.edu.hk/handle/200/1621
Abstract: This dissertation has discussed means and techniques to improve Mixed-signal testing of analog integrated systems in industrial environment by using the innovation of IEEE boundary scan techniques. The IEEE std. 1149.1 is widely used since it was introduced in 1990. The proposed IEEE P1149. Mixed-signal Boundary Scan standard extends the IEEE std. 1149.1 Digital Boundary Scan standard, adding analog and parametric measurement. In the dissertation the proposed IEEE P1149.4 Test Bus was introduced such as basic architecture, Analog Boundary Modules, Analog Test Bus, TBIC, Test Access Port and ATP Controller, etc. Besides, the discussion of the Test Capability of the IEEE P1149.4 will be included in Chapter 4 and also will be analysed in detail as how to apply this proposed standard in the Mixed-signal testing. There are two case studies in Chapter 5. The purpose of these two case studies is to investigate the effect of the test performance after implementing the IEEE P1149.4. It revealed that the key impact on the analog testing is the parasitic effect of the test bus because it will limit signal bandwidth and distort test signal. This will de-grade the testing performance. In order to eliminate the parasitic effect of the testing bus, there are many methods to cope with such testing de-gradation. Although this will complicate the testing procedure, it can remove or reduce the parasitic effect efficiently. Two of these methods are introduced in chapter 6. One is an 'Intrinsic Response Extraction Algorithm' and the other one is the using of 'High Speed Test Bus'. Approval of the proposed IEEE P1149.4 standard by the test community/industry is expected in the near future and consists of an extension to 1149.1, defining the structures that are to be added to an 1149.1 -compliant chip, in order to simplify the testing of Mix-signal circuits.

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