Investigation and design of single-stage single-switch power factor corrected AC/DC converter

Pao Yue-kong Library Electronic Theses Database

Investigation and design of single-stage single-switch power factor corrected AC/DC converter

 

Author: Cheung, Man-chi
Title: Investigation and design of single-stage single-switch power factor corrected AC/DC converter
Degree: M.Sc.
Year: 2000
Subject: Analog-to-digital converters -- Design and construction
Hong Kong Polytechnic University -- Dissertations
Department: Multi-disciplinary Studies
Dept. of Electronic and Information Engineering
Pages: 134 leaves : ill. ; 30 cm
Language: English
InnoPac Record: http://library.polyu.edu.hk/record=b1517701
URI: http://theses.lib.polyu.edu.hk/handle/200/2053
Abstract: A new Single-stage Single-switch PFC (S4PFC) topology [6] is investigated. During the investigation of the PFC topology, some PFC basics [7] are studied and described. They include power factor, current harmonics definitions, international standard IEC1000-3-2 that is governing the necessity of PFC requirement and various popular PFC topologies. The popular PFC topology is indeed a two-stage converter, which doubled the convener size and hence increases the weight and cost. Such topology is inapplicable to some small-size, lightweight and cost-reduced applications, like notebook computer and light consumer products. One has found to modify the current two-stage PFC topology into a single-stage PFC for above reasons [1]. However, the side effect of the combined single-stage PFC results a very large variation of the storage capacitor voltage. This requires very high-voltage rating components to be used (i.e. 600V storage capacitor and 1000V MOSFET switch). Such topology is not really practical to implement the advantage of single-stage PFC topology. A new single-stage PFC topology is therefore investigated. It concentrates on solving the large capacitor voltage variation problem so that the single-stage PFC becomes practical and popular. By adding extra windings to the power transformer, the large voltage variation of the capacitor due to all load conditions is greatly reduced (i.e. < 400V in wide input range application). One has evaluated the topology performance by verifying the storage capacitor voltage using energy-balanced concept [1]. In the dissertation, such concept is used. The Energy-balanced equation is derived and solved by own means for the system evaluation. A design of power converter employing such new topology is also provided. The design is mainly based on the Energy-balanced equation to solve the system parameters (i.e. components values and component voltages / currents). They are determined by iterations of numerical method because of the implicit expression of the Energy-balanced equation. Some hardware testing results are obtained on a 50W (20V, 2.5A) S4PFC converter prototype.

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