Concurrent error diagnosis and correction in linear analog circuits

Pao Yue-kong Library Electronic Theses Database

Concurrent error diagnosis and correction in linear analog circuits

 

Author: Tam, Wai-chun
Title: Concurrent error diagnosis and correction in linear analog circuits
Degree: M.Sc.
Year: 1997
Subject: Electric circuits, Linear
Linear integrated circuits
Electronic circuit design
Hong Kong Polytechnic University -- Dissertations
Department: Multi-disciplinary Studies
Pages: x, 183 leaves : ill. ; 30 cm
Language: English
InnoPac Record: http://library.polyu.edu.hk/record=b1398099
URI: http://theses.lib.polyu.edu.hk/handle/200/2092
Abstract: Fault-tolerant design of analog circuits is more difficult than that of digital circuits. The technique proposed by Abhijit Chatterjee [1] can address concurrent error detection and correction in linear analog circuits and hence the reliability of the original circuit is greatly improved. This dissertation is mainly involved in design and implementation of a workable concurrent error diagnosis and correction circuitry using the continuous checksum-based error detection scheme in linear analog circuit. To the best of our knowledge, this is first application of concurrent error diagnosis and correction techniques to linear analog circuits. The integration and comparison error detection scheme has been selected for implementing error diagnosis and correction in linear analog circuit because the selected scheme can easily applicable to complex circuit and to design test circuits. The error diagnosis and correction are achieved in two different approaches, namely : (1) mixed-signal approach and (2) pure digital computation approach. The actual implementation of the mixed-signal approach of concurrent error detection has been successfully developed and the simulation results on the biquadratic and the leapfrog filters show that the response of the faulty filter ( under various resistor faults ) can be recovered back to the fault-free response by applying this concurrent error correction to the circuit. But the main drawback to this scheme, as the size of cascade stages of the linear analog circuit increases , the hardware required for the correction circuits are also greatly increased. We have overcome this problem by replacing the entire correction using mixed-signal approach with pure digital approach, which will allow all decision making by computation. The hardware required for digital approach is virtually constant irrespective of the size of the linear analog circuit. The workability of the digital implementation of error diagnosis and correction has been proved by hardware prototyping and the results obtained from laboratory are matched with the simulation results for the same type of circuits. Finally, we have presented a brief discussion on fault sensitivity due to component tolerance.

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