Harmonic current reduction in SMPS

Pao Yue-kong Library Electronic Theses Database

Harmonic current reduction in SMPS

 

Author: Yan, Kam-man
Title: Harmonic current reduction in SMPS
Degree: M.Sc.
Year: 2000
Subject: Switching power supplies
Harmonics (Electric waves)
Hong Kong Polytechnic University -- Dissertations
Department: Multi-disciplinary Studies
Dept. of Electronic and Information Engineering
Pages: x, 74 leaves : ill. ; 31 cm
Language: English
InnoPac Record: http://library.polyu.edu.hk/record=b1517683
URI: http://theses.lib.polyu.edu.hk/handle/200/2675
Abstract: The use of the Switching Mode Power Supply (SMPS) in electronic product is very popular. Size reduction and multi-function of the electronic equipment make the reliability of the SMPS for power up this small equipment become more and more important. Moreover, the SMPS quality is also important in electronic applications, such as, load regulations, efficiency, thermal properties and finally Electro-Magnetic Interference (EMI). For a high quality SMPS, the harmonic current distortion and the power factor are also highly emphasized in some applications. There has been much research in the field of Power Factor Correction (PFC), that one of the basic concepts is using the PFC circuit connected in cascade with a DC/DC converter. However, the component, size and cost cannot be reduced significantly. Besides, the integration of the PFC and the converter will face the increase of the current consumption and the decrease of the efficiency of the SMPS. The most important thing in reducing the harmonic current is to spread out the sharp current waveform into a long duration current pulse. The fundamental concept of spreading out the sharp current pulse is that the charging and discharging paths for the bulk capacitor are not the same. In order to separate the charging and discharging paths, diodes can be added in the circuit. The most common method is to use two capacitors and three diodes. So there is a series connection for the two capacitors in the charging stage and a parallel connection in the discharging stage. The aim of this project is to design and to construct a Power Factor Corrected SMPS in a different way so that the harmonic current, the component voltage and current stresses will be decreased. It has been successful to build a hardware using the non-linear capacitor circuit in SMPS such that the SMPS can handle universal input voltage and +-10% variable load.

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