Decoding of LDPC convolutional codes

Pao Yue-kong Library Electronic Theses Database

Decoding of LDPC convolutional codes

 

Author: Chan, Chi-ho
Title: Decoding of LDPC convolutional codes
Degree: M.Sc.
Year: 2012
Subject: Coding theory -- Mathematics.
Error-correcting codes (Information theory)
Hong Kong Polytechnic University -- Dissertations
Department: Dept. of Electronic and Information Engineering
Pages: xvi, 60 leaves : ill. (some col.) ; 30 cm.
Language: English
InnoPac Record: http://library.polyu.edu.hk/record=b2475746
URI: http://theses.lib.polyu.edu.hk/handle/200/6447
Abstract: Recently, there have been different applications, namely 10GBase-T Ethernet, video broadcasting and satellite communication, utilizing low-density parity-check (LDPC) codes as the forward-error-correction codes. The main reason is that the error performance of LDPC codes can be very close to the Shannon limit. LDPC codes can be further categorized into LDPC block codes (LDPC-BCs) and LDPC convolutional codes (LDPC-CCs). It has also been discovered that LDPC-CCs usually outperform LDPC-BCs of the same length. In this thesis, the Sum Product Algorithm (SPA) and the Min-Sum Algorithm (MSA) are used for decoding LDPC-CCs. The two algorithms have been implemented and run on three different computing environments. The first environment is a single-threading Central Processing Unit (CPU); the second one is the multi-threading CPU based on OpenMP (Open Multi-Processing); and the third one is the multi-threading Graphics Processing Unit (GPU). The error performance of the LDPC-CCs and the simulation time taken under the three specific computing environments and the two decoding algorithms are evaluated and compared. It is found that the SPA gives lower error rates compared with the MSA and that the different computing environments produce very similar error results. It is also concluded that using the GPU computing platform can reduce the simulation time substantially.

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