Simulation and characterization of semiconductor GaAs compatible ferroelectric devices for monolithic integration technology

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Simulation and characterization of semiconductor GaAs compatible ferroelectric devices for monolithic integration technology


Author: Mak, Kwong Wai
Title: Simulation and characterization of semiconductor GaAs compatible ferroelectric devices for monolithic integration technology
Degree: M.Phil.
Year: 2014
Subject: Gallium arsenide semiconductors -- Design and construction
Microwave integrated circuits -- Design and construction
Hong Kong Polytechnic University -- Dissertations
Department: Dept. of Applied Physics
Pages: xii, 110, 9 leaves : illustrations ; 30 cm
Language: English
InnoPac Record:
Abstract: Semiconductor gallium arsenide (GaAs) is preferred substrate material in the commercial microwave circuit due to its high frequency response of the signal and relatively insensitive to heat during signal transmission. Besides GaAs, ferroelectric titanates are popular functional materials, not only because of their high dielectric constant, but also their tunable properties. The behavior of ferroelectric titanates is modified when applying an electrical field on it. This property makes devices able to process the signal continuously without replacing devices or redirect the signals to other components. To enhance the benefit of using both materials, ferroelectric microwave devices can be integrated onto GaAs wafer to form a monolithic integrated circuit. A typical example is tunable interdigital capacitors (IDCs) capacitor containing the barium strontium titanate (BST) active layer fabricated on a GaAs substrate. The performances of IDCs are usually described through the traditional analytical model. Such as Gevorgin’s model and Igreja’s model, which are commonly used for estimating IDCs integrated with monocrystalline silicon or oxide substrate. However the great difference is found between the results of calculation by these conventional models and characterization by experiments. In this thesis, these traditional models are modified by considering the specific parameters associated with GaAs substrate. Another distinct modification in this work is an inclusion of phenomenological (thermodynamic) models for the displacement type of ferroelectric materials. This approach has created the complete picture of modifying the capacitance of the IDC through applying additional DC voltages. During the modifying model, the software Ansoft Maxwell 2D (cross section) and HFSS (3D) were used to simulate IDCs by using the finite element method of numerical electromagnetic simulation. They provide evidence for modifying the conventional models. With the modified model, the behavior of IDC with BST was simulated in this work. The mathematical simulation was performed by using MATLAB. In addition, the graphical user interface was also created to provide convenient input of IDC parameters. The IDCs with Ba0.7Sr0.3TiO3-STO-GaAs Heterostructure is employed for the simulation and fabricated using laser molecular beam epitaxy. The thickness of the BST layer in these IDCs is 250-nm and 400-nm. The 1 GHz frequency and the bias voltage are applied directly to the IDCs. They are investigated experimentally by using Agilent/HP 4291B RF impedance/material analyzer, with an ACP40-GS-100 probe mounted on the Cascade probe station. The capacitance and tunability of these IDCs are also provided by the simulation using the modified model in this work. With reasonable material parameters setting, the tunability is calculated as 26.98% and 28.68%, for the 250-nm BST at 3V DC biasing and for the 400-nm BST at 4V DC biasing respectively. In contrast, Gevorgin’s model, one of the traditional models, in ideal cases gives tunability 56.33% and 64.25%, which is greatly different compared to experimental results which are 25.4% and 28.5%.

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