Thermal-aware FPGA design for behavioral IPs HW Trojans detection

Pao Yue-kong Library Electronic Theses Database

Thermal-aware FPGA design for behavioral IPs HW Trojans detection


Author: Li, Xiaotong
Title: Thermal-aware FPGA design for behavioral IPs HW Trojans detection
Degree: M.Sc.
Year: 2015
Subject: Hardware Trojans (Computers)
Computer security.
Hong Kong Polytechnic University -- Dissertations
Department: Dept. of Electronic and Information Engineering
Pages: 1 volume (various pagings) : illustrations ; 30 cm
Language: English
InnoPac Record:
Abstract: One of the biggest advantages of C-Based VLSI design is its ability to automatically generate architectures with different trade-off s by only setting different synthesis options. This work uses this property to detect temperature-triggered HW Trojan in third party behavioral IPs (3PBIPs). A complete design flow is presented. It comprises two main phases: (1) At the first phase a design space explorer generates micro-architectures with different area vs. performance vs. power trade-offs automatically for the given behavioral IP. (2) The second phase maps three of these micro-architectures with different power problems to a reconfigurable computing board to create a 3-way redundant system. This system combined with a majority voter scheme is used to detect if a HW Trojan is present in the behavioral IP. Having different power profiles implies that each micro-architecture has a different thermal behavior and thus will trigger the HW Trojan at different time intervals. Therefore the outputs of the three designs are compared for discrepancies at regular intervals. Our method can therefore exactly pinpoint the trigger temperature of the HW Trojan. A case study of ADPCM is presented showing the effectiveness of our method.

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