Implementation of TCP/IP protocol based on FPGA

Pao Yue-kong Library Electronic Theses Database

Implementation of TCP/IP protocol based on FPGA

 

Author: Chen, Cheng
Title: Implementation of TCP/IP protocol based on FPGA
Degree: M.Sc.
Year: 2014
Subject: Electronic data processing.
Computer networks -- Design and construction.
Hong Kong Polytechnic University -- Dissertations
Department: Faculty of Engineering
Pages: xii, 82 leaves : illustrations ; 30 cm
Language: English
InnoPac Record: http://library.polyu.edu.hk/record=b2819479
URI: http://theses.lib.polyu.edu.hk/handle/200/8142
Abstract: With the rapid development of information and network technology, the demands on the transmission of network data become higher and higher. Compared to processing network packets using hardware method, the conventional way in implementing the TCP/IP protocol based on CPU and software tools, has less efficiency and lower speed. Moreover, when the bandwidth reaches gigabit level, the CPU may not be able to smoothly handle the network data, because of the processors limited speed. FPGA (Field Programmable Gate Array) has rich programmable resources. We can use hardware description language, Verilog HDL or VHDL, to achieve many complex functions. Using a hardware logic circuit to implement the TCP/IP protocol will improve the data processing ability. As the circuit designed for TCP/IP protocol is specific for network data exchange, the processing speed will be much higher, which is beyond the software tools. Meanwhile, as a programmable instrument, FPGA can be properly configured to satisfy different needs of different users. Nowadays there are many different kinds of tools for FPGA developing, with strong functions and high intelligence, from input, synthesize and simulation to configuration and optimization. These all help to reduce the development cycle time and cost. And many functional modules also have been generated into different Intellectual Property cores, which is also helpful to save time. Under this background, this dissertation is completed with the help of design platform Quartus II and simulation tool Modelsim. Through this project, I have strengthened my knowledge of TCP/IP protocol and FPGA.

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