Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor | Multi-disciplinary Studies | en_US |
| dc.creator | Wong, Siu-ying Adeline | - |
| dc.identifier.uri | https://theses.lib.polyu.edu.hk/handle/200/2783 | - |
| dc.language | English | en_US |
| dc.publisher | Hong Kong Polytechnic University | - |
| dc.rights | All rights reserved | en_US |
| dc.title | Dynamic harmonic analyzer | en_US |
| dcterms.abstract | The goal of this project is to appreciate the classical approach in digital signal processing. The notorious FFT bin is overcome by the use of a multi-drop decimation filter and an all digital phase-locked loop. All these are implemented by a 24 bit DSP from Motorola. | en_US |
| dcterms.extent | 157 leaves : ill. ; 30 cm | en_US |
| dcterms.isPartOf | PolyU Electronic Theses | en_US |
| dcterms.issued | 1997 | en_US |
| dcterms.educationalLevel | All Master | en_US |
| dcterms.educationalLevel | M.Sc. | en_US |
| dcterms.LCSH | Signal processing -- Digital techniques | en_US |
| dcterms.LCSH | Motion control devices | en_US |
| dcterms.LCSH | Hong Kong Polytechnic University -- Dissertations | en_US |
| dcterms.accessRights | restricted access | en_US |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| b13986193.pdf | For All Users (off-campus access for PolyU Staff & Students only) | 3.94 MB | Adobe PDF | View/Open |
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