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DC FieldValueLanguage
dc.contributorMulti-disciplinary Studiesen_US
dc.creatorWong, Siu-ying Adeline-
dc.identifier.urihttps://theses.lib.polyu.edu.hk/handle/200/2783-
dc.languageEnglishen_US
dc.publisherHong Kong Polytechnic University-
dc.rightsAll rights reserveden_US
dc.titleDynamic harmonic analyzeren_US
dcterms.abstractThe goal of this project is to appreciate the classical approach in digital signal processing. The notorious FFT bin is overcome by the use of a multi-drop decimation filter and an all digital phase-locked loop. All these are implemented by a 24 bit DSP from Motorola.en_US
dcterms.extent157 leaves : ill. ; 30 cmen_US
dcterms.isPartOfPolyU Electronic Thesesen_US
dcterms.issued1997en_US
dcterms.educationalLevelAll Masteren_US
dcterms.educationalLevelM.Sc.en_US
dcterms.LCSHSignal processing -- Digital techniquesen_US
dcterms.LCSHMotion control devicesen_US
dcterms.LCSHHong Kong Polytechnic University -- Dissertationsen_US
dcterms.accessRightsrestricted accessen_US

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Please use this identifier to cite or link to this item: https://theses.lib.polyu.edu.hk/handle/200/2783