Author: Zhang, Pengwei
Title: Protograph-based low-density parity-check hadamard codes
Advisors: Lau, C. M. Francis (EIE)
Degree: Ph.D.
Year: 2021
Subject: Error-correcting codes (Information theory)
Hong Kong Polytechnic University -- Dissertations
Department: Department of Electronic and Information Engineering
Pages: xix, 142 pages : color illustrations
Language: English
Abstract: This thesis proposes and analyzes a new class of ultimate-Shannon­limit approaching codes, namely protograph-based low-density parity-check (PLDPC) Hadamard codes. This class of code has a low code rate and can achieve excellent error performance even at a very low bit-energy-to-noise-power-spectral-density ratio (i.e., Eb/N0 < 0 dB). Application scenarios include multiple access wireless systems with a huge number of non-orthogonal users and deep space communications. Firstly, we describe the protograph structure and protomatrix of a protograph-based low-density parity-check Hadamard block code (PLDPCH-BC). To optimize the structure of the PLDPCH-BC, we propose a low-complexity Protograph Extrinsic Information Transfer (PEXIT) method based on Monte Carlo simulations. Given multiple a priori information and channel information, the proposed method can obtain multiple extrinsic mutual information (MI) from the symbol-by-symbol maximum a posteriori probability (symbol-MAP) Hadamard decoder. Moreover, this method is applicable to low/high and/or even/odd order of Hadamard codes, and can compute the theoretical thresholds of PLDPCH-BCs with degree-1 or/and punctured variable nodes. Optimized designs for PLDPCH-BCs with Hadamard codes of different orders are derived. Simulations are performed on the constructed codes and the simulated error rates are compared with those of traditional LDPC-Hadamard codes. In addition, PLDPCH-BCs are punctured and their simulation results are compared with unpunctured PLDPCH-BCs. Secondly, we propose an efficient and effective layered decoding algorithm for PLDPCH-BCs, and compare its convergence speed with that of the standard decoding algorithm. We further implement the proposed layered decoding algorithm onto hardware, namely an FPGA board, and evaluate its error performance under different throughputs. The error degradation due to fixed-point computation is also evaluated. Thirdly, we make use of the optimized PLDPCH-BC designs to construct spatially-coupled PLDPC-Hadamard convolutional codes (SC-PLDPCH-CCs), the error performance of which is also close to the ultimate Shannon limit. We introduce the encoding of SC-PLDPCH-CCs using their convolutional parity-check matrices. We propose a pipelined decoding strategy with a layered decoding algorithm so as to perform efficient and effective decoding for the SC-PLDPCH-CCs. We simulate the error performance of SC-PLDPCH-CCs with different rates and different number of processors contained in pipeline decoding. The error performance of the SC-PLDPCH-CCs is compared with that of PLDPCH-BCs.
Rights: All rights reserved
Access: open access

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