Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor | Department of Electronic and Information Engineering | en_US |
| dc.contributor.advisor | Sham, Chiu-wing Bruce (EIE) | - |
| dc.creator | Zhou, Hongxia | - |
| dc.identifier.uri | https://theses.lib.polyu.edu.hk/handle/200/7864 | - |
| dc.language | English | en_US |
| dc.publisher | Hong Kong Polytechnic University | - |
| dc.rights | All rights reserved | en_US |
| dc.title | Routability-driven floorplanning of analog and mixed-signal circuits | en_US |
| dcterms.abstract | The exponential increase in scale and complexity of very large scale integrated circuits (VLSI) poses a great challenge to the present electronic design automation (EDA) techniques. As an essential step in the whole EDA layout synthesis, placement design is attracting more and more attention, especially the one for analog and mixed-signal integrated circuits. Recently, the experts in this field observe a variety of analog-specific layout constraints to obtain high-performance placements. These constraints include symmetry, alignment, boundary, preplace, abutment, range and maximum separation and addition-ally the routability of the placement. In order to solve this multi-objective placement problem, two different approaches are proposed in this thesis. One employs the sequence pair (SP) representation to solve the placement problem with mixed constraints. The routability of the placement is improved by performing module expansion according to the net congestion probability in the circuits. The other one applies the polish expression (PE) representation and utilizes the characteristics of the slicing structures to achieve better placement results. Experimental results on area and routability demonstrate that the two approaches are effective and feasible in solving the complex placement problem. | en_US |
| dcterms.extent | ix, 97 leaves : illustrations ; 30 cm | en_US |
| dcterms.isPartOf | PolyU Electronic Theses | en_US |
| dcterms.issued | 2014 | en_US |
| dcterms.educationalLevel | All Master | en_US |
| dcterms.educationalLevel | M.Phil. | en_US |
| dcterms.LCSH | Integrated circuits. | en_US |
| dcterms.LCSH | Electronic circuit design. | en_US |
| dcterms.LCSH | Hong Kong Polytechnic University -- Dissertations | en_US |
| dcterms.accessRights | open access | en_US |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| b27805281.pdf | For All Users | 2.36 MB | Adobe PDF | View/Open |
Copyright Undertaking
As a bona fide Library user, I declare that:
- I will abide by the rules and legal ordinances governing copyright regarding the use of the Database.
- I will use the Database for the purpose of my research or private study only and not for circulation or further reproduction or any other purpose.
- I agree to indemnify and hold the University harmless from and against any loss, damage, cost, liability or expenses arising from copyright infringement or unauthorized usage.
By downloading any item(s) listed above, you acknowledge that you have read and understood the copyright undertaking as stated above, and agree to be bound by all of its terms.
Please use this identifier to cite or link to this item:
https://theses.lib.polyu.edu.hk/handle/200/7864